MOS Capacitor: 5 Interesting Facts To Know

Topic of Discussion: MOS Capacitor

  • Introduction of MOS Capacitor
  • Interface charge of MOS Capacitor
  • Working Principle in different states
  • MOS capacitance
  • MOS Threshold voltage

What is MOS Capacitor ?

To build a A MOS capacitor, the mostly needed and major thing is the gate-channel-substrate structure.

This particular type of capacitor has two-terminals which is mainly a semiconductor device; it is made of a metal contact & a dielectric insulator.

An extra ohmic contact is given at the semiconductor substrate.

MOS Structure

The MOS structure is mostly consisted of three things:

  1. The doped silicon as the substrate
  2. Oxide Layer
  3. Insulator material: Silicon dioxide.

 Here, the insulating quality of the oxide which is uesd is quite good. The oxide-semiconductor’s density and width are very low at the particular channel accordingly.

MOS Capacitor layers
MOS Capacitor layers

 When a bias voltage is applied,  all the charges and interferences are prevented due to the infinite resistance of the respective insulator; hence in the metal some counter charges are produced in the same layer.

The counter charges and voltage which were produced previously are used in the capacitor to control the interface charge (majority carriers, minority carriers etc). However,  the ability of fabricating a conducting sheet of minority carrier at the boundary is essential for MOS design.

Interface Charge of a MOS capacitor:

This is typically associated to the shape of the electron energy band of the semiconductor adjoining the edge. At a very low voltage,the energy band is defined by means of different properties and constructions i.e., metalic and the semiconductors. In the equation below, all the changes happened due to applied bias and voltage i.e., it becomes flat band is shown as



Øm and Øs  = work functions of the metal and the semiconductor,

rXs = semiconductor’s electron affinity,

Ec =  the energy of the conduction band edge, and

EF = Fermi level at zero voltage.

MOS Capacitor at Zero Bias and Applied Voltage:

MOS Capacitor
MOS Capacitor at Zero Bias and Applied Voltage

In this stable state, no current flow is observed in the perpendicular direction towards the high resistance of the insulator layers.

 Hence, we consider the Fermi level as constant inside the semiconductor, No other biasing will change its value.

The shifted or constant Fermi Level is shown by,

EFm – EFs = qV.

This is called quasi-equilibrium situation where the semiconductor can be used as thermal equilibrium.

When a voltage is applied in a MOS structure with a p-type semiconductor, it seems to grow upward and makes the flat band voltage negative.

In depletion mode or region, it becomes V >VFB                                               

With the increasing applied voltage and a bigger and greater energy band the difference in between the Fermi level and at the end of the conduction band at the semiconductor interface starts decreasing as well with respect to the Fermi level. Hence it becomes V = 0 V.

In higher applied voltage, the  electron concentration volume at the interface will cross the doping density of material.

ψ denotes potential differences of the semiconductors, when a place X is chosen in the semicon.

By taking consideration of electron equilibrium information, the intrinsic Fermi level Ei contracts to an different energy level qϕb from the actual Fermi level EF of selected doped semiconductor material,

 Φ = Vth ln (Na/ni)

Channel formation in n-MOS MOSFET shown as band diagram: Top panels: An applied gate voltage bends bands, depleting holes from surface (left).
Image Credit : Brews ohareSemiconductor band-bendingCC BY-SA 3.0
Body Effect
Band diagram showing body effect.
Image credit : Brews ohareInversion with source-body biasCC BY-SA 3.0

MOS Capacitance:

A MOS capacitor is designed with the metallic contacts with the neutralised sections inside a doped semiconductor material. The semiconductors is also allied in series with an insulator usually prepared by silicon oxide.

The series connection between these two is presented by ,

 Ci = Sεi/di,


  • S = Area of MOS capacitor,
  • Cs  = capacitance of the active semiconductor,
eq 1
  • CMOS = The semiconductor capacitance can be calculated as,
eq 2


  • Qs =  total charge density / area
  • ψs is the surface potential.
Illustration of C V measurement
Capacitance Voltage Characteristics of MOSFET.
Image Credit : Saumitra R Mehrotra & Gerhard Klimeck, Illustration of C-V measurementCC BY 3.0

Threshold Voltage of MOS Capacitor:

The threshold voltage is measured as V = VT . This thereshold voltage is one of the significant parameters which denotes in metal insulator semiconductor devices. The prevailing inversion may takes place if the surface potential ψs turn out to be equivalent by term 2ϕb.

The charge at the insulator-semiconductor interface of depletion layer is expressed as,

3 2

The threshold voltage applied to the ground potential is shifted by VB. A change in a MOSFET occurs when the conduction layer of moveable electron is kept at approximately fixed potentials. By taking into consideration that the inversion layer is at ground, The voltage VB is biasing the active junction amongst the inversion layer and speified substrate, and capacity of charge changeablity at depletion layer. In this case, the threshold voltage turn out to be,

4 2

The threshold voltage is changed if the surface conditions at the semiconductor oxide interface and differs within the insulated layer. The sub-threshold is hereby overlapped with the threshold voltage and the moveable carriers is increasing exponentially with the increment in applied voltage.

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